Signal Integrity Considerations for High Speed Digital Hardware Design

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Despite the fact that Signal Integrity (SI) is among the most fundamental of design practices for hardware engineers, the digital design community has long ignored it. Through the age of low-speed logic, designing for SI was considered wasted effort, as the probability of SI-related issues was low. However as clock rates and rise times increased through the years, the need for SI analysis and design also increased. Unfortunately many designers have not heeded the call and still neglect to consider SI in their designs.
Modern digital circuits can operate up to gigahertz frequencies with rise times in the order of fifty picoseconds. At these speeds, a carelessly designed PCB trace only needs to be an inch or so long before it radiates. Radiating traces create voltage, timing and interference problems not only on that line, but also across the entire board and even across adjacent boards.
The problem is even more critical with mixed-signal circuits. For example, consider a system that relies upon a high- erformance ADC to digitize received analog signals. The energy on the digital outputs of the ADC could easily be 130dB (10,000,000,000,000 times) more the energy on the analog input. Any noise on the digital side of the ADC could annihilate the low-level analog signal so preventing noise leakage is critical.
Designing for SI need not be an arduous process. The key to designing for SI is to recognise potential problems as early in the design stage and prevent them from causing problems later. This paper outlines some key SI challenges and discusses some steps to address them.