Operation and Design of Multilevel Inverters

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The concept of utilizing multiple small voltage levels to perform power conversion was patented by an MIT researcher over twenty years ago [1,2]. Advantages of this multilevel approach include good power quality, good electromagnetic compatibility (EMC), low switching losses, and high voltage capability. The main disadvantages of this technique are that a larger number of switching semiconductors are required for lower-voltage systems and the small voltage steps must be supplied on the dc side either by a capacitor bank or isolated voltage sources. The first topology introduced was the series H-bridge design [1]. This was followed by the diodeclamped [2-4] converter which utilized a bank of series capacitors. A later invention [5] detailed the flying capacitor design in which the capacitors were floating rather than series-connected. Another multilevel design involves parallel connection of inverter phases through inter-phase reactors [6]. In this design, the semiconductors block the entire dc voltage, but share the load current. Several combinational
designs have also emerged [7] some involving cascading the fundamental topologies [8-12]. These designs can create higher power quality for a given number of semiconductor devices than the fundamental topologies alone due to a multiplying effect of the number of levels